Patent №
US 6,629,207
Granted
2003-09-30
Filed 1999
Owner
HITACHI LTD.
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
09410693
Methods of operating an instruction cache memory in a data processing system are disclosed. The data processing system executes instructions and stores and receives data from a memory having locations in a memory space. The entries of the instruction cache memory include a number of sets (nsets), where each of the sets comprise a number of ways (nways). One or more first instructions may be executed to load one or more instructions into a first way of the instruction cache memory. One or more second instructions may be executed to lock the first way of the instruction cache memory. A sequence of instructions may be executed including the one or more instructions loaded in the first way of the instruction cache memory, and it may be predetermined that the one or more instructions loaded in the first way of the instruction cache memory will executed without retrieving the one or more instructions from the memory during execution of the sequence of instructions. The instruction cache memory may be controlled by a control register in a register space separate from the memory space. The one or more second instructions may include a PUT instruction for writing information to the control register that controls the locking of the instruction cache memory. The sequence of instructions including the one or more instructions loaded in the first way of the instruction cache memory may be executed in a manner where it is predetermined that the one or more instructions loaded in the first way of the instruction cache memory will be executed during execution of the sequence of instructions without a cache miss.
AI classification
Ownership
HITACHI LTD.
assignment · 106190655
Assignors
YOSHIOKA, SHINICHI, CHOPRA, RAJESH, HASEGAWA, ATSUSHI
On an employer assignment, the assignors are typically the inventors.