VARIABLE LENGTH CODING PACKING ARCHITECTURE

Patent №

US 6,653,953

Granted

2003-11-25

Filed 2001

Owner

INTEL CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

09935524

Embodiments of a variable length coding packing architecture are discussed. In this regard, an example method of packing selected portions of separate bit strings into a buffer is presented. The example method comprises using multiplexers (MUXes) to select the desired portions of the separate bit strings to be packed in the buffer, and using MUXes to order the bits of the selected portions for packing in particular buffer locations.

AI hardwareH03M 7/3084H03M 7/40

AI classification

AI hardware0.72
Knowledge representation0.01
Natural language0.01
Planning0.00
Machine learning0.00
Evolutionary computation0.00
Vision0.00
Speech0.00

Ownership

INTEL CORPORATION

assignment · 122490581

Assignors

BECKER, RICARDO A., ACHARYA, TINKU

On an employer assignment, the assignors are typically the inventors.

From the same owner

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