Patent US 6,671,678

A multi-functional arithmetic apparatus with multi value-states comprise a gating array, which is composed of gating elements arranged in n row by m column. Each gating element has at least two input terminals and one output terminal, and has input value-states and output value-states. There is operational relationship between the input value-state and the output value-state according to the model of self-organizing principle of integer cluster. The output value-states determine the output based on the gating of the gating element, i.e. the mathematical manipulation is completed by the structure operation. The mathematical manipulation may be addition operation, subtract operation, mixed mode operation and bidirectional logic reversible operation implemented by one add operation and two subtract operations. Multi value-states ALU bit slice which can implement add operation, subtract operation and bidirectional logic reversible operation are provided by utilizing the gating array with carry circuit, borrow circuit and numeral system set peripheral circuit, whereby provides a new multi value-states and parallel process computer.