INSPECTION SYSTEM, INSPECTION APPARATUS, INSPECTION PROGRAM, AND PRODUCTION METHOD OF SEMICONDUCTOR DEVICES

Patent №

US 6,687,633

Granted

2004-02-03

Filed 2002

Owner

HITACHI, LTD.

Lab

AI components

1

planning

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

10079518

In the wafer production process of a semiconductor integrated circuit, an inspection system and an inspection apparatus that convert and output a yield loss at high accuracy from the result of a defect inspection, such as a dark-field inspection and a bright-field inspection without waiting for the result of the final probing test. Defect map data read processing and kill ratio computation data read processing are performed. Subsequently, kill ratio computation processing every defect computes a kill ratio every defect using defect map data and kill ratio computation data. Subsequently, kill ratio computation processing every chip computes a kill ratio every LSI chip using the kill ratio every defect. Subsequently, yield loss computation processing computes a yield loss of the defect map data using the kill ratio every chip and yield loss output processing outputs the computation result.

PlanningH01L 21/67288H10P 72/0616

AI classification

Planning0.69
AI hardware0.15
Knowledge representation0.13
Vision0.02
Evolutionary computation0.02
Machine learning0.00
Natural language0.00
Speech0.00

Ownership

HITACHI, LTD.

assignment · 126260720

Assignors

ONO, MAKOTO, IWATA, HISAFUMI

On an employer assignment, the assignors are typically the inventors.

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