METHOD OF ANALYZING A CIRCUIT HAVING AT LEAST ONE STRUCTURAL LOOP BETWEEN DIFFERENT CHANNEL CONNECTED COMPONENTS WITHIN THE CIRCUIT
Patent №
US 6,711,534
Granted
2004-03-23
Filed 1999
Owner
MOTOROLA, INC.
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
09393988
A method of analyzing a circuit having a structural loop between different channel connected components within the circuit first splits the circuit into its constituent channel connected components (100). The structural loops are then detected and broken (101) before obtaining a pair of boolean functions at each break point (102) by inserting a pair of temporary boolean variables at the break point on a boundary between different channel connected components and analyzing each channel connected component in the structural loop utilizing the pair of temporary boolean variables to obtain the pair of boolean functions representing the functionality of the circuit at the break point. The pair of boolean functions are then analyzed (103) to determine whether the structural loop is sequential in nature, and, if so, the pair of boolean functions is modified (105) in order to remove any dependence in the pair of boolean functions on the pair of boolean variables.
AI classification
Ownership
MOTOROLA, INC.
assignment · 102340297
Assignors
PARASHKEVOV, ATANAS NIKOLAEV
On an employer assignment, the assignors are typically the inventors.