INTEGRATED CIRCUIT THAT PROCESSES COMMUNICATION PACKETS WITH SCHEDULER CIRCUITRY HAVING MULTIPLE PRIORITY LEVELS

An integrated circuit processes communication packets and comprises a core processor and scheduling circuitry. The core processor executes a software application that directs the core processor to process the communication packets. The scheduling circuitry comprises multiple scheduling boards where at least some of the scheduling boards have multiple priority levels. The scheduling circuitry processes the scheduling boards to schedule and subsequently initiate transmission of the communication packets.