Patent №
US 6,760,880
Granted
2004-07-06
Filed 1999
Owner
PARTHUSCEVA LTD.
+1 more
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
09391363
An apparatus includes a plurality of AND gates each to receive as input a bit of a first binary vector and a corresponding bit of a second binary vector, where the length of the first binary vector is not greater than the length of the second binary vector. The apparatus also includes a multiple input XOR gate to calculate in a single cycle a scalar product of the first binary vector and the second binary vector by performing an exclusive OR operation on the output of each of the AND gates.
AI hardwareH03M 13/033
AI classification
AI hardware1.00
Natural language0.06
Machine learning0.06
Knowledge representation0.03
Vision0.00
Speech0.00
Evolutionary computation0.00
Planning0.00
Ownership
PARTHUSCEVA LTD.
assignment · 151610354
CEVA D.S.P. LTD.
namechg · 151610364
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