PERFORMANCE ADDER FOR TRACKING OCCURRENCE OF EVENTS WITHIN A CIRCUIT

A performance adder for providing a running total of performance values within an integrated circuit chip. The performance adder is triggered by various performance events as determined through multiplexer logic for detecting occurrence of a particular performance event. The multiplexer logic can also trigger the performance adder through atomic, edge, toggle, or on/off signals related to the performance events or through a logical function of a combination of performance events. The performance adders can be used to compute average latency of a component in the circuit.