Patent №
US 6,794,906
Granted
2004-09-21
Filed 2002
Owner
STMICROELECTRONICS PVT. LTD.
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
10269166
An improved multi-stage binary hierarchy decoder characterized in that at least one of the decoding stages subsequent to the first stage is implemented as a Transmission Gate Matrix (TGM) in which a single transmission gate enables an active input from the previous stage to its output, thereby resulting in reduced area requirements when implemented as an integrated circuit.
AI hardwareH03K 17/693
AI classification
AI hardware0.93
Evolutionary computation0.05
Machine learning0.02
Speech0.01
Natural language0.01
Vision0.00
Knowledge representation0.00
Planning0.00
Ownership
STMICROELECTRONICS PVT. LTD.
assignment · 136870939
Assignors
GOEL, ASHISH KUMAR, AGARWAL, MANISH
On an employer assignment, the assignors are typically the inventors.
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