METHOD FOR ADAPTIVE ARBITRATION OF REQUESTS FOR MEMORY ACCESS IN A MULTI-STAGE PIPELINE ENGINE

Patent №

US 6,804,758

Granted

2004-10-12

Filed 2001

Owner

SILICON INTEGRATED SYSTEMS, CORP.

+1 more

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

09895604

In a method for adaptive arbitration of requests for accessing a memory unit in a multi-stage pipeline engine that includes a plurality of request queues corresponding to the stages of the pipeline engine, each of the request queues is assigned to one of a high-priority group and a low-priority group in accordance with an operating state of the memory unit. The request queues in the high-priority group are then processed prior to the request queues in the low-priority group.

AI classification

AI hardware0.64
Planning0.04
Natural language0.01
Knowledge representation0.01
Evolutionary computation0.00
Vision0.00
Machine learning0.00
Speech0.00

Ownership

SILICON INTEGRATED SYSTEMS, CORP.

assignment · 119630483

XGI TECHNOLOGY INC.

assignment · 156850781

Assignors

LIAO, MING-HAO, PAI, HUNG-TA

On an employer assignment, the assignors are typically the inventors.

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