SELECTABLE DYNAMIC RECONFIGURATION OF PROGRAMMABLE EMBEDDED IP

Patent №

US 6,842,034

Granted

2005-01-11

Filed 2003

Owner

ALTERA CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

10612253

Improved communication, and an improved communication interface, between the core PLD fabric of a PLD and embedded IP building blocks resident therein is provided. A circuit according to the invention may include at least two different signal paths between the PLD core fabric and embedded IP building blocks. Either one, or both, of these two paths may be used for configuration and/or implementation of the embedded IP building blocks.

AI hardwareH03K 19/17752H03K 19/17732H03K 19/17736H03K 19/17744

AI classification

AI hardware1.00
Planning0.01
Evolutionary computation0.00
Machine learning0.00
Natural language0.00
Knowledge representation0.00
Speech0.00
Vision0.00

Ownership

ALTERA CORPORATION

assignment · 142540653

Assignors

CHAN, VINSON, LEE, CHONG, PATEL, RAKESH, VENKATA, RAMANAND, TON, BINH

On an employer assignment, the assignors are typically the inventors.

© 2026 NYSGPT2525 LLC