METHOD AND APPARATUS FOR VARYING THE LEVEL OF CORRECTNESS CHECKS EXECUTED WHEN PEFORMING CORRECTNESS CHECKS OPPORTUNISTICALLY USING SPARE INSTRUCTION SLOTS
Patent №
US 6,880,153
Granted
2005-04-12
Filed 2000
Owner
HEWLETT-PACKARD COMPANY
Lab
—
AI components
1
kr
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
09718059
The present invention provides a method (FIG. 6) and an apparatus that enable spare instruction slots within a code module to be utilized opportunistically for insertion of instructions associated with correctness check functions. During the generation of the initial instruction schedule, the compiler examines the initial instruction schedule and determines locations of spare instruction slots that can potentially be utilized for insertion of the correctness check code sequences. If a sufficient number of spare instruction slots exist to accommodate the correctness check code sequences, the sequences are inserted into the instruction schedule. If an insufficient number of spare instruction slots exist to accommodate a code sequence, the compiler adds additional instruction slots if a sufficient number of additional instruction slots can be added for insertion of the check sequences without exceeding a run-time performance cost tolerance level designated by a user.
AI classification
Ownership
HEWLETT-PACKARD COMPANY
assignment · 113380692
Assignors
THOMPSON, CAROL L.
On an employer assignment, the assignors are typically the inventors.