Patent №
US 6,883,166
Granted
2005-04-19
Filed 2000
Owner
HEWLETT-PACKARD COMPANY
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
09717570
A method and an apparatus that enable spare instruction slots within a code module to be utilized opportunistically for insertion of instructions associated with correctness check functions. The apparatus comprises a compiler that generates code and an initial instruction schedule. During generation of the initial instruction schedule, the compiler ignores code sequences associated with correctness check functions. After the initial instruction schedule has been generated, the compiler examines the initial instruction schedule and determines locations of spare instruction slots in the initial instruction schedule that can potentially be utilized for insertion of the code sequences associated with the correctness checks. The code sequences associated with the correctness checks are then inserted into the instruction schedule to the extent that insertion of the code sequences does not lengthen the final instruction schedule. Consequently, no performance penalty is incurred at run time.
AI classification
Ownership
HEWLETT-PACKARD COMPANY
assignment · 117440932
Assignors
THOMPSON, CARL L.
On an employer assignment, the assignors are typically the inventors.