SCHEME FOR MAINTAINING SYNCHRONIZATION IN AN INHERENTLY ASYNCHRONOUS SYSTEM

Patent №

US 6,898,211

Granted

2005-05-24

Filed 1999

Owner

CISCO TECHNOLOGY, INC.

+1 more

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

09334693

A synchronization state for a local clock generating circuit of a first of a number of components of a distributed system is maintained according to a number of local clock cycles recorded between successive occurrences of a global synchronization signal provided to the components within the distributed system. The local clock generating circuit may enters the synchronization state only after observing a predetermined number of occurrences of successive local clock cycles between instances of the global synchronization signal. The local clock generating circuit continues to provide local control signals for the first of the components at time instants corresponding to the number of local clock cycles even after an instance of the global synchronization signal is observed at a time instant corresponding to one local clock cycle more or less than the number of local clock cycles. However, the local clock generating circuit enters an alarm state when the global synchronization signal is observed at time instants corresponding to more than one local clock cycle more or less than the number of local clock cycles.

AI classification

AI hardware0.90
Natural language0.04
Knowledge representation0.03
Vision0.03
Planning0.00
Evolutionary computation0.00
Machine learning0.00
Speech0.00

Ownership

CISCO TECHNOLOGY, INC.

assignment · 137650903

CISCO TECHNOLOGY, INC. A CORPORATION OF CALIFORNIA

assignment · 137800974

Assignors

LAU, ONCHUEN D., CHUI, FRANK, CHUI, GENE, KIPNIS, GARY, SAMRAO, GURMOHAN

On an employer assignment, the assignors are typically the inventors.

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