USING CONVERSION OF HIGH LEVEL DESCRIPTIVE HARDWARE LANGUAGE INTO LOW LEVEL TESTING LANGUAGE FORMAT FOR BUILDING AND TESTING COMPLEX COMPUTER PRODUCTS WITH CONTRACT MANUFACTURERS WITHOUT PROPRIETARY INFORMATION

Patent №

US 6,941,243

Granted

2005-09-06

Filed 2003

Owner

UNISYS CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

10603407

Electronics manufacturers, particularly ones building large scale computer systems, have a need to describe test vectors for third party manufacturers in a low level language description that does not reveal the circuit design to the third party but allows for the third party to build and test the systems, not just with static tests based on BSDL and netlist files, but dynamic tests as well. A conversion process for taking a high level language circuitry description and producing test vectors useable for translation into actual test vectors for testing board-level components of the large scale computer systems is described.

AI classification

AI hardware0.92
Natural language0.04
Planning0.00
Knowledge representation0.00
Speech0.00
Vision0.00
Machine learning0.00
Evolutionary computation0.00

Ownership

UNISYS CORPORATION

assignment · 142520609

Assignors

MACIONA, GERALD J., JENNION, MARK W., SHRAMKO, WILLIAM

On an employer assignment, the assignors are typically the inventors.

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