EFFICIENCY OF RECONFIGURABLE HARDWARE

Patent №

US 6,941,539

Granted

2005-09-06

Filed 2002

Owner

SRC COMPUTERS, INC.

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

10285401

The present invention includes a method of computing a function array in reconfigurable hardware that includes forming in the reconfigurable hardware a first delay queue and a second delay queue, inputting from a source array outside the reconfigurable hardware a first value into the first delay queue and a second value into the second delay queue, defining in the reconfigurable hardware a window array comprising a first cell and a second cell, inputting the first value from the first delay queue into the first cell and the second value from the second delay queue into the second cell, and calculating an output value for the function array based on the window array. The present invention also includes a method of loop stripmining and a method of calculating output values in a fused producer/consumer loop structure.

AI hardwareG06F 30/34G06F 15/7867Y02D 10/00

AI classification

AI hardware1.00
Vision0.03
Machine learning0.01
Speech0.00
Planning0.00
Evolutionary computation0.00
Knowledge representation0.00
Natural language0.00

Ownership

SRC COMPUTERS, INC.

assignment · 136620958

Assignors

HAMMES, JEFFREY

On an employer assignment, the assignors are typically the inventors.

From the same owner

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