MANAGING LATENCIES IN ACCESSING MEMORY OF COMPUTER SYSTEMS

Patent №

US 6,944,736

Granted

2005-09-13

Filed 2002

Owner

HEWLETT-PACKARD COMPANY

+1 more

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

10044364

The present invention, in various embodiments, provides techniques for managing latencies in accessing memory of computer systems. In one embodiment, upon accessing the memory system for a piece of data used by a first process, a latency manager determines the access time to acquire the piece of data in the memory system. The latency manager then compares the determined access time to a threshold. If the determined access time is greater than the threshold, the latency manager triggers an interrupt for the operating system to switch threads or processes so that execution of the first process is postponed and execution of a second process starts. Various embodiments include the latency manager is polled for the access time when the processor is stalled, the latency manager triggers a process switch when a particular memory subsystem is accessed, etc.

AI classification

AI hardware0.98
Planning0.00
Vision0.00
Natural language0.00
Evolutionary computation0.00
Machine learning0.00
Knowledge representation0.00
Speech0.00

Ownership

HEWLETT-PACKARD COMPANY

assignment · 127150562

MOSAID TECHNOLOGIES INCORPORATED

namechg · 578570204

Assignors

WILSON, KENNETH M., AGLIETTI, ROBERT B.

On an employer assignment, the assignors are typically the inventors.

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