METHOD AND APPARATUS FOR CONFIGURING A PROGRAMMABLE LOGIC DEVICE USING A MASTER JTAG PORT

Method and apparatus for configuring a programmable logic device using configuration data stored in an external memory is described. In an example, a boundary scan port includes a data input terminal and a data output terminal. An instruction-set processor includes a first interface coupled to the boundary scan port and a second interface coupled to a configuration memory within the programmable logic device. The data output terminal of the boundary scan port is coupled to provide instruction data to the external memory and the data input terminal is coupled to receive configuration data from the external memory in response to the instruction data. The instruction-set processor is configured to provide configuration data to the configuration memory.