TECHNIQUES FOR IMPLEMENTING ADDRESS RECYCLING IN MEMORY CIRCUITS

Patent №

US 6,961,280

Granted

2005-11-01

Filed 2003

Owner

ALTERA CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

10731279

Techniques are provided for recycling addresses in memory blocks. Address signals in memory blocks are stored temporarily in a set of parallel coupled address registers. The address registers transfer the address signals to an address decoder block, which decodes the address signals. The address decoder block transfers the decoded addresses to a memory array. A stall state occurs when the cache memory block needs a new set of data to replace the old set of data. Address signals are stored in the address registers during the stall state by coupling each register's output to its data input using a series of multiplexers. The multiplexers are controlled by an address stall signal that indicates the onset and the end of a stall state. After the end of a stall state, the address registers store the next address signal received at the memory block.

AI hardwareG11C 8/06G06F 12/0895G11C 8/10

AI classification

AI hardware0.85
Knowledge representation0.02
Evolutionary computation0.00
Machine learning0.00
Vision0.00
Natural language0.00
Planning0.00
Speech0.00

Ownership

ALTERA CORPORATION

assignment · 144030694

Assignors

PAN, PHILIP, SUNG, CHIAKANG, HUANG, JOSEPH, CHONG, YAN, TAN, JOHNSON

On an employer assignment, the assignors are typically the inventors.

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