FLOATING-GATE SEMICONDUCTOR STRUCTURES

Patent №

US 6,965,142

Granted

2005-11-15

Filed 2002

Owner

CALIFORNIA INSTITUTE OF TECHNOLOGY

Lab

AI components

2

ml · hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

10192773

Hot-electron injection driven by hole impact ionization in the channel-to-drain junction of a p-channel MOSFET provides a new mechanism for writing a floating-gate memory. Various pFET floating-gate structures use a combination of this mechanism and electron tunneling to implement nonvolatile analog memory, nonvolatile digital memory, or on-line learning in silicon. The memory is nonvolatile because the devices use electrically isolated floating gates to store electronic charge. The devices enable on-line learning because the electron injection and tunneling mechanisms that write the memory can occur during normal device operation. The memory updates and learning are bidirectional because the injection and tunneling mechanisms add and remove electrons from the floating gate, respectively. Because the memory updates depend on both the stored memory and the pFETs terminal voltages, and because they are bidirectional, the devices can implement on-line learning functions.

Machine learningAI hardwareH10D 30/0411H10B 41/30H10B 41/60H10B 69/00H10D 30/683H10D 30/685

AI classification

AI hardware1.00
Machine learning1.00
Planning0.01
Vision0.01
Natural language0.00
Evolutionary computation0.00
Speech0.00
Knowledge representation0.00

Ownership

CALIFORNIA INSTITUTE OF TECHNOLOGY

assignment · 134260195

Assignors

DIORIO, CHRISTOPHER J., HUMES, TODD E.

On an employer assignment, the assignors are typically the inventors.

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