CIRCUIT AND A METHOD TO SCREEN FOR DEFECTS IN AN ADDRESSABLE LINE IN A NON-VOLATILE MEMORY

Patent №

US 6,972,994

Granted

2005-12-06

Filed 2004

Owner

SILICON STORAGE TECHNOLOGY, INC.

Lab

AI components

2

ml · hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

10797156

A circuit to screen for defects in an addressable line in a non-volatile memory array comprises a current mirror circuit which has a plurality of mirroring stages. The current mirror circuit is connected to the addressable line and receives a control signal and mirrors the control signal to provide a current to the addressable line. In a preferred embodiment, the current mirror circuit provides a high voltage current to the addressable line which is used to effectuate an operation such as program or erase to the memory cells connected to the addressable line. The change in state or the absence of change in state of the memory cells connected to the addressable line can be used to screen for defects in the addressable line.

AI classification

AI hardware0.99
Machine learning0.66
Vision0.00
Evolutionary computation0.00
Natural language0.00
Speech0.00
Knowledge representation0.00
Planning0.00

Ownership

SILICON STORAGE TECHNOLOGY, INC.

assignment · 150860819

Assignors

NGUYEN, HUNG Q., CHOI, STEVE, HOANG, LOC, KOTOV, ALEXANDER

On an employer assignment, the assignors are typically the inventors.

© 2026 NYSGPT2525 LLC