EMBEDDING A JTAG HOST CONTROLLER INTO AN FPGA DESIGN

A method for embedding a Joint Test Action Group (JTAG) standard IEEE 1149.1 host controller into a field programmable gate array (FPGA) for platform development and DSP programming, and boundary scan of targeted hardware using JTAG commands and architecture is described. The FPGA-based JTAG host controller is bussed directly into the FPGA core, bypassing the board's JTAG communication port.