CIRCUIT AND METHOD FOR FULL SEARCH BLOCK MATCHING

A circuit and method for full search block matching, capable of quickly calculating the motion vector with lower power consumption, are provided. In the circuit and method for full search block matching, a best matching candidate block is selected by performing a predetermined operation between the reference block pixel data and the candidate block pixel data of a plurality of candidate blocks. The feature of the circuit and method lies in that computation on some pixels can be skipped after determination as to whether to continue or stop the computation on a candidate block. The circuit and method for full search block matching can considerably reduce the number of computations so that the motion vector can be rapidly calculated, saving power.