ENABLING VERIFICATION OF A MINIMAL LEVEL SENSITIVE TIMING ABSTRACTION MODEL

Patent №

US 6,996,515

Granted

2006-02-07

Filed 2001

Owner

HEWLETT-PACKARD COMPANY

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

09927204

A method and a corresponding apparatus for verifying a minimal level sensitive timing abstraction model provides for an extension of the timing abstraction model. The method modifies and runs the timing abstraction model with certain stimulus to establish whether the timing results with the timing abstraction model are identical to the timing result with the modeled circuit. The timing abstraction model extension, which enables verification of the timing abstraction model, only negligibly increases the size of the timing abstraction model, thus keeping STA runtimes short and the memory requirements small.

AI classification

AI hardware0.92
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Evolutionary computation0.00
Natural language0.00
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Ownership

HEWLETT-PACKARD COMPANY

assignment · 125710114

Assignors

FOLTIN, MARTIN, FOUTZ, BRIAN, TYLER, SEAN

On an employer assignment, the assignors are typically the inventors.

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