Patent №
US 7,002,832
Granted
2006-02-21
Filed 2003
Owner
STMICROELECTRONICS, S.A.
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
10694317
A multiple-level memory cell including a storage element formed of several polysilicon resistors connected in series between two input/output terminals; and a load in series with said resistive element, the midpoint of this series connection forming a read terminal of the memory cell, and the respective junction points of said resistors of the storage element being accessible.
AI classification
AI hardware0.97
Machine learning0.07
Natural language0.00
Vision0.00
Knowledge representation0.00
Evolutionary computation0.00
Speech0.00
Planning0.00
Ownership
STMICROELECTRONICS, S.A.
assignment · 146450881
Assignors
WUIDART, LUC, BARDOUILLET, MICHEL
On an employer assignment, the assignors are typically the inventors.
From the same owner
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