VERSATILE SYSTEM FOR CONTROLLING SEMICONDUCTOR TOPOGRAPHY

Patent №

US 7,010,381

Granted

2006-03-07

Filed 2003

Owner

TEXAS INSTRUMENTS INCORPORATED

Lab

AI components

1

planning

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

10654063

The present invention defines a system (200) for selectively controlling post-CMP dishing effects occurring in semiconductor wafers having copper metallization. The system has a CMP system (202) that performs copper overpolish and barrier polish on a copper-based semiconductor wafer (206). A profilometer (204) measures actual dishing occurring in the copper metallization after polishing. An input data set (220) includes a dishing target for the semiconductor wafer. A data integrity function (212) evaluates the profilometer's measurement, and generates an indicator of the reliability of the measurement. A modeling function (214) receives the measurement, the indicator, and the dishing target, and evaluates any differential between the dishing target and actual dishing. The modeling function generates a processing target to eliminate the differential, and modifies this process responsive to the indicator. A processing control function (210) receives the processing target, and alters the copper overpolish or barrier polish responsive to the processing target.

PlanningH01L 21/67253H10P 72/0604H01L 22/20H10P 74/23

AI classification

Planning1.00
Knowledge representation0.35
Evolutionary computation0.01
Natural language0.00
Vision0.00
Machine learning0.00
Speech0.00
AI hardware0.00

Ownership

TEXAS INSTRUMENTS INCORPORATED

assignment · 144660379

Assignors

PATEL, NITAL S., TIWARI, RAJESH

On an employer assignment, the assignors are typically the inventors.

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