GENERALIZED FAULT MODEL FOR DEFECTS AND CIRCUIT MARGINALITIES

Patent №

US 7,036,063

Granted

2006-04-25

Filed 2002

Owner

INTEL CORPORATION

Lab

AI components

1

planning

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

10256678

A generalized fault model. For one aspect, extracted faults may be modeled using a fault model in which at least one of the following is specified: multiple fault atoms, two or more impact conditions for a first set of excitation conditions, a relative priority of fault atoms within a set of fault atoms used to model the at least one extracted fault, a dynamic fault delay, and excitation conditions including at least a first mandatory excitation condition and at least a second optional excitation condition.

PlanningG01R 31/31835G01R 31/318342G11B 20/18G11B 20/1816

AI classification

Planning0.51
AI hardware0.15
Knowledge representation0.14
Machine learning0.01
Evolutionary computation0.00
Natural language0.00
Speech0.00
Vision0.00

Ownership

INTEL CORPORATION

assignment · 133410418

Assignors

KUNDU, SANDIP, SENGUPTA, SANJAY, GOSWAMI, DHIRAJ

On an employer assignment, the assignors are typically the inventors.

From the same owner

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