Patent №
US 7,047,432
Granted
2006-05-16
Filed 2003
Owner
CISCO TECHNOLOGY, INC.
Lab
—
AI components
2
kr · hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
10347084
Synchronizing output from timed circuits includes receiving a first clock signal having a first frequency at a first timed circuit. A first sequence of first circuit values is retrieved from the first timed circuit, and first count values are periodically inserted into the first sequence using a first counter. A second clock signal having a second frequency is received at a second timed circuit, where the first frequency corresponds to a multiple of the second frequency. A second sequence of second circuit values is retrieved from the second timed circuit and second count values are periodically inserted into the second sequence using a second counter. The first sequence can be synchronized with the second sequence according to the first count values, the second count values, and the multiple.
AI classification
Ownership
CISCO TECHNOLOGY, INC.
assignment · 136810528
Assignors
MARTINEZ, JR., MARVIN W.
On an employer assignment, the assignors are typically the inventors.