METHOD OF INCREASING RELIABILITY OF PACKAGED SEMICONDUCTOR INTEGRATED CIRCUIT DICE

Patent №

US 7,105,364

Granted

2006-09-12

Filed 2004

Owner

ATMEL CORPORATION

Lab

AI components

1

planning

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

10940128

Semiconductor dice are electrically tested prior to final assembly. Dice failing the test are identified and not packaged. However, “good dice” (i.e., those dice that passed testing) in proximity to the failed dice frequently fail prematurely in the field. Therefore, in one embodiment, a method to identify those dice having a probability for early failure includes identifying a core die and a die cluster, adding the core die and at least one additional die from the die cluster to a weighted character map, and assigning a weighting value to each of the dice added to the weighted character map. At least one tier of buffer dice is then added to the weighted character map adjacent to each die on the weighted character map. Both the dice from the die cluster and the tier of buffer dice are marked, thereby preventing those dice from being packaged and consequently, shipped to customers.

PlanningH01L 22/20H10P 74/23

AI classification

Planning0.87
Vision0.18
AI hardware0.04
Machine learning0.01
Natural language0.01
Knowledge representation0.00
Evolutionary computation0.00
Speech0.00

Ownership

ATMEL CORPORATION

assignment · 159650961

Assignors

SUCIU, PAUL I., MARCUS, KRISTOPHER R., FRIEDBERG, CHARLES B.

On an employer assignment, the assignors are typically the inventors.

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