Patent №
US 7,106,728
Granted
2006-09-12
Filed 2000
Owner
—
Lab
—
AI components
2
ml · hardware
Assignment
None on record
Dataset
AIPD
2023_r1 edition
Application
09561974
A method and apparatus for performing switching by multistage interconnection of switching elements with improved performance and low layout complexity is disclosed. The techniques of line grouping, concentrators, self-route control through sorting are applied to relieve the output contention problem and uneven incoming traffic. Further a new class of interconnection networks called the divide-and-conquer networks is disclosed, the networks have very modular structure and the optimal layout complexity amongst all multistage interconnection networks.