SYSTEM AND METHOD FOR CONTROLLING ANALYSIS OF MULTIPLE INSTANTIATIONS OF CIRCUITS IN HIERARCHICAL VLSI CIRCUIT DESIGNS

Patent №

US 7,124,380

Granted

2006-10-17

Filed 2004

Owner

HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Lab

AI components

1

planning

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

10803561

A method for controlling analysis by an analysis tool of multiple instantiations of a circuit in a hierarchical circuit design is described. The method comprises providing a user-selected analysis option to the analysis tool; analyzing a first instantiation of the circuit as specified by the analysis option; and responsive to the first instantiation of the circuit passing the analysis, terminating analysis of the circuit.

AI classification

Planning0.54
Knowledge representation0.03
AI hardware0.01
Natural language0.01
Speech0.00
Evolutionary computation0.00
Machine learning0.00
Vision0.00

Ownership

HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

assignment · 151210778

Assignors

KELLER, S. BRANDON, ROGERS, GREGORY DENNIS, ROBBERT, GEORGE HAROLD

On an employer assignment, the assignors are typically the inventors.

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