DYNAMIC REGISTER WITH IDDQ TESTING CAPABILITY

Patent №

US 7,129,697

Granted

2006-10-31

Filed 2005

Owner

Lab

AI components

1

hardware

Assignment

None on record

Dataset

AIPD

2023_r1 edition

Application

11200661

The present invention is a method and a system for controlling a voltage at a node in a circuit such that the node is prevented from having an unknown floating voltage during a steady state of a clock signal. The circuit includes a transmission gate which has input and output terminals, and operates in response to a clock signal. The node is located proximal to the output terminal of the transmission gate. The method includes the operations of driving the node with an input signal when the transmission gate is open during a first steady state of the clock signal and pulling the node to a fixed voltage when the transmission gate is closed during a second steady state of the clock signal

AI hardwareH04L 7/0062G01R 31/3004G01R 31/3008G01R 31/3012G01R 31/3016G01R 31/31715G01R 31/318502G01R 31/318552+22 more

AI classification

AI hardware0.97
Natural language0.00
Vision0.00
Machine learning0.00
Knowledge representation0.00
Evolutionary computation0.00
Speech0.00
Planning0.00
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