METHOD OF AND SYSTEM FOR VALIDATING AN ERROR CORRECTION CODE AND PARITY INFORMATION ASSOCIATED WITH A DATA WORD

A data processing system includes an input portion for receiving a digital word having N bits of data and M bits for error detection, a first error correction code generator for generating a first error correction code based on the N bits of data of the digital word and a second error correction code generator for generating a second error correction code based on the N bits of data of the digital word. A first logic operator performs a first logic operation on the first error correction code and the second error correction code to generate a data signature representative of a comparison of the first error correction code and the second error correction code and a second logic operator performs a second logic operation on the data signature and the M bits of the digital word to generate a constant signal representing a comparison of the data signature and the M bits of the digital word. A comparator compares the generated constant signal to a predetermined constant signal to determine if an error has occurred in at least one of the N bits of data in the digital word, the M bits of data in the digital word, the first error correction code and the second error correction code and an error signal generator generates an error signal indicating that an error has occurred in at least one of the N bits of data in the digital word, the M bits of data in the digital word, the first error correction code and the second error correction code if the generated constant signal is different from the predetermined constant signal.