Patent №
US 7,154,135
Granted
2006-12-26
Filed 2005
Owner
AMERICAN SEMICONDUCTOR, INC.
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
11273362
An OR gate circuit includes double-gated four terminal transistor with independent gate control. First and second inputs are independently coupled to the top and bottom gates of the transistor. The drain is coupled to an output and precharged to a low voltage. An input to either the top or bottom gates results in a high voltage to the drain and an output value of 1.
AI hardwareH10D 30/615H01L 21/2256H03K 19/0948H10D 30/0225H10D 30/0323H10D 30/6734H10D 64/018H10D 84/0135+6 more
AI classification
AI hardware0.71
Natural language0.00
Evolutionary computation0.00
Vision0.00
Knowledge representation0.00
Machine learning0.00
Speech0.00
Planning0.00
Ownership
AMERICAN SEMICONDUCTOR, INC.
assignment · 172360040
Assignors
HACKLER SR., DOULGAS R., PARKE, STEPHEN A.
On an employer assignment, the assignors are typically the inventors.