PARALLEL CONCATENATED TURBO CODE MODULATION ENCODER

Parallel concatenated turbo trellis encoder structure. A dual path turbo trellis coded modulation encoder employs two interleavers and two constituent encoders and is also operable to encode symbols whose code rate may vary on a symbol by symbol basis. In addition, each of the interleavers of the parallel concatenated turbo trellis encoder structure may perform modified interleaving where input bits are treated differently depending on the order in which they are received. This interleaving may be differentiated on a bit level. In some embodiments, the implementation of the parallel concatenated turbo trellis encoder structure ensures that the output order of encoded symbols is the same as the order in which the input is received. This input may itself be in the form of bits and/or symbols. Alternatively, the parallel concatenated turbo trellis encoder structure may also support a scrambled ordering of the encoded output with respect to the input.