SYNCHRONIZATION CIRCUIT

Patent №

US 7,218,698

Granted

2007-05-15

Filed 2003

Owner

U-BLOX AG

Lab

AI components

2

planning · hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

10618051

A sychronization circuit comprising an analog feedback shift register for generating an internal sequence which is synchronized with an external sequence containing repetitions of a fundamental sequence has a feedback circuit which, for the formation of a new value of a fundamental sequence, combines at least two values (x1,x2) stored in the shift register according to a feedback function (f(x1,x2)), which is then scaled with a factor k, 0.9<k<0.99. The synchronization behaviour is improved, especially in the case of signals with strong background noise, by using a feedback function which is substantially linear in the sectors defined by the signs of the arguments and whose sign corresponds to that of the negative of the product of the negative arguments and whose magnitude is 1 if the magnitudes of the arguments are each 1. A function which meets these requirements and has proved useful is f(x1, . . . , xm)=−sig((−x1)· . . . ·(−xm))·(|x1|+ . . . +|xm|)/m. For improving the signal/noise ratio, there is a buffer in front of the analog feedback shift register, where, for the generation of the external sequence, segments of an input sequence which contain several, e.g. twenty, successive instances of the fundamental sequence are added and then read out repeatedly.

PlanningAI hardwareH04B 1/7075G01S 19/24H04J 13/10

AI classification

Planning0.91
AI hardware0.82
Speech0.00
Natural language0.00
Vision0.00
Evolutionary computation0.00
Machine learning0.00
Knowledge representation0.00

Ownership

U-BLOX AG

assignment · 146770625

Assignors

KAEGI, DANIEL, MATHIS, HEINZ, THIEL, ANDREAS

On an employer assignment, the assignors are typically the inventors.

From the same owner

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