INTEGRATED DEVICE WITH AN IMPROVED BIST CIRCUIT FOR EXECUTING A STRUCTURED TEST

Patent №

US 7,246,288

Granted

2007-07-17

Filed 2004

Owner

STMICROELECTRONICS S.R.L.

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

10876372

An integrated device including a functional circuitry and a built-in self testing circuit for executing a structured test on the functional circuitry is proposed. The functional circuitry includes means for receiving input test values from the built-in self testing circuit and returning output test values to the built-in self testing circuit. In the solution of the invention, the built-in self testing circuit includes a memory for storing starting test values and expected test values, means for generating the input test values according to the starting test values, and means for determining a result of the structured test according to a comparison between the output test values and the expected test values.

AI hardwareG01R 31/31724G01R 31/3004G01R 31/3187G01R 31/006G01R 31/318547G01R 31/318577

AI classification

AI hardware0.95
Knowledge representation0.06
Planning0.02
Vision0.00
Machine learning0.00
Evolutionary computation0.00
Natural language0.00
Speech0.00

Ownership

STMICROELECTRONICS S.R.L.

assignment · 152430333

Assignors

CASARSA, MARCO

On an employer assignment, the assignors are typically the inventors.

From the same owner

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