SELECTABLE OPEN CIRCUIT AND ANTI-FUSE ELEMENT

Patent №

US 7,250,667

Granted

2007-07-31

Filed 2006

Owner

Lab

AI components

1

hardware

Assignment

None on record

Dataset

AIPD

2023_r1 edition

Application

11306663

An integrated circuit is provided with a semiconductor substrate that is doped with a set concentration of an oxidizable dopant of a type that segregates to the top surface of a silicide when the semiconductor substrate is reacted to form such a silicide. A gate dielectric is on the semiconductor substrate, and a gate is on the gate dielectric. Source/drain junctions are in the semiconductor substrate. A silicide is on the source/drain junctions and dopant is segregated to the top surface of the silicide. The dopant on the top surface of the segregated dopant is oxidized to form an insulating layer of oxidized dopant above the silicide. An interlayer dielectric is above the semiconductor substrate. Contacts and connection points are in the interlayer dielectric to the insulating layer of oxidized dopant above the silicide.

AI hardwareH10B 20/00H10B 20/25H01L 23/5252H01L 2924/0002H10W 20/491

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