PHASE-LOCKED LOOP OSCILLATORY NEUROCOMPUTER

Patent №

US 7,280,989

Granted

2007-10-09

Filed 2001

Owner

ARIZONA BOARD OF REGENTS

Lab

AI components

2

ml · hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

09771019

A neural network computer (20) includes a weighting network (21) coupled to a plurality of phase-locked loop circuits (251-25N). The weighting network (21) has a plurality of weighting circuits (C11, . . . , CNN) having output terminals connected to a plurality of adder circuits (311-31N). A single weighting element (Ckj) typically has a plurality of output terminals coupled to a corresponding adder circuit (31k). Each adder circuit (31k) is coupled to a corresponding bandpass filter circuit (31k) which is in turn coupled to a corresponding phase-locked loop circuit (25k). The weighting elements (C1,1, . . . , CN,N) are programmed with connection strengths, wherein the connection strengths have phase-encoded weights. The phase relationships are used to recognize an incoming pattern.

AI classification

Machine learning1.00
AI hardware0.99
Vision0.23
Knowledge representation0.00
Speech0.00
Planning0.00
Evolutionary computation0.00
Natural language0.00

Ownership

ARIZONA BOARD OF REGENTS

assignment · 118310493

Assignors

HOPPENSTEADT, FRANK C., IZHIKEVICH, EUGENE M.

On an employer assignment, the assignors are typically the inventors.

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