PROCESSING PACKET SEQUENCE USING SAME FUNCTION SET PIPELINED MULTIPLE THREADS SPANNING OVER MULTIPLE PROCESSING ENGINES AND HAVING EXCLUSIVE DATA ACCESS
Patent №
US 7,302,549
Granted
2007-11-27
Filed 2005
Owner
INTEL CORPORATION
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
11092366
A system and method for employing multiple hardware contexts and programming engines in a functional pipeline partitioned to facilitate high performance data processing. The system and method includes processing a sequence of packets with a sequence of threads, with the sequence of threads spanning multiple programmable processing elements integrated within a processor, and with the programmable processing elements providing multiple threads of execution such that each of the threads acquires exclusive modification access to data shared.
AI classification
Ownership
INTEL CORPORATION
assignment · 163250143
Assignors
WILKINSON, HUGH M., III, ADILETTA, MATTHEW J., WOLRICH, GILBERT, ROSENBLUTH, MARK B., BERNSTEIN, DEBRA, WILDE, MYLES J.
On an employer assignment, the assignors are typically the inventors.