RANDOMIZED SELF-CHECKING TEST SYSTEM

Patent №

US 7,334,178

Granted

2008-02-19

Filed 2005

Owner

XSIGO SYSTEMS

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

11222590

Methods and apparatus are provided for verifying and validating operation of a design under test (DUT). Input data sequences having information used to check expected outputs are provided to a DUT. The input data sequences include checking headers and data. The checking headers and data are randomized using encryption to verify and validate operation of the DUT on a variety of bit sequences. Different keys are used to allow further scrambling.

AI hardwareH04L 9/00G01R 31/318342G06F 11/3696H04L 2209/08H04L 2209/26H04L 2209/56

AI classification

AI hardware0.95
Knowledge representation0.00
Natural language0.00
Evolutionary computation0.00
Planning0.00
Machine learning0.00
Vision0.00
Speech0.00

Ownership

XSIGO SYSTEMS

assignment · 198980657

Assignors

AULAGNIER, PIERRE

On an employer assignment, the assignors are typically the inventors.

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