METHOD AND SYSTEM FOR CACHING ADDRESS TRANSLATIONS FROM MULTIPLE ADDRESS SPACES IN VIRTUAL MACHINES

Patent №

US 7,363,463

Granted

2008-04-22

Filed 2005

Owner

MICROSOFT CORPORATION

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

11128982

A method of virtualizing memory through shadow page tables that cache translations from multiple guest address spaces in a virtual machine includes a software version of a hardware tagged translation look-aside buffer. Edits to guest page tables are detected by intercepting the creation of guest-writable mappings to guest page tables with translations cached in shadow page tables. The affected cached translations are marked as stale and purged upon an address space switch or an indiscriminate flush of translations by the guest. Thereby, non-stale translations remain cached but stale translations are discarded. The method includes tracking the guest-writable mappings to guest page tables, deferring discovery of such mappings to a guest page table for the first time until a purge of all cached translations when the number of untracked guest page tables exceeds a threshold, and sharing shadow page tables between shadow address spaces and between virtual processors.

AI hardwareG06F 12/1036G06F 2212/151G06F 2212/683

AI classification

AI hardware1.00
Speech0.01
Planning0.00
Machine learning0.00
Natural language0.00
Evolutionary computation0.00
Knowledge representation0.00
Vision0.00

Ownership

MICROSOFT CORPORATION

assignment · 164910096

Assignors

SHEU, JOHN TE-JUI, BAILEY, DAVID S., TRAUT, ERIC P., VEGA, RENE ANTONIO

On an employer assignment, the assignors are typically the inventors.

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