REAL-TIME IMPLEMENTATION OF FIELD PROGRAMMABLE GATE ARRAYS (FPGA) DESIGN IN HYPERSPECTRAL IMAGING

Patent №

US 7,366,326

Granted

2008-04-29

Filed 2004

Owner

UNIVERSITY OF MARYLAND BALTIMORE COUNTY

Lab

AI components

4

ml · vision · evo · hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

10875102

A Field Programmable Gate Arrays (FPGA) design uses a Coordinate Rotation DIgital Computer (CORDIC) algorithm that can convert a Givens rotation of a vector to a set of shift-add operations. The CORDIC algorithm can be easily implemented in hardware architecture, therefore in FPGA. Since the computation of the inverse of the data correlation matrix involves a series of Givens rotations, the utility of the CORDIC algorithm allows a causal Constrained Energy Minimization (CEM) to perform real-time processing in FPGA. An FPGA implementation of the causal CEM is described and its detailed architecture is also described.

Machine learningVisionEvolutionary computationAI hardwareG06F 7/5446G06F 17/11G06T 7/11G06T 7/194G06V 10/955G06V 20/13G06T 2200/28G06T 2207/10036+1 more

AI classification

Machine learning1.00
Vision1.00
AI hardware0.99
Evolutionary computation0.88
Speech0.04
Planning0.01
Knowledge representation0.00
Natural language0.00

Ownership

UNIVERSITY OF MARYLAND BALTIMORE COUNTY

assignment · 161490877

Assignors

CHANG, CHEIN-I, WANG, JIANWEI

On an employer assignment, the assignors are typically the inventors.

From the same owner

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