REDUCING FLOATING GATE TO FLOATING GATE COUPLING EFFECT

Patent №

US 7,397,698

Granted

2008-07-08

Filed 2007

Owner

SANDISK CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

11735265

For a non-volatile memory system, compressing the erase threshold voltage distribution into the lowest threshold voltage state will decrease the valid data threshold voltage window. Decreasing the valid data threshold voltage window reduces the floating gate to floating gate coupling effect. The compression can be performed as part of the erase process or part of the programming operation.

AI hardwareG11C 16/10G11C 16/16

AI classification

AI hardware0.96
Natural language0.00
Speech0.00
Planning0.00
Machine learning0.00
Evolutionary computation0.00
Vision0.00
Knowledge representation0.00

Ownership

SANDISK CORPORATION

assignment · 191640211

Assignors

FONG, YUPIN, GUTERMAN, DANIEL C.

On an employer assignment, the assignors are typically the inventors.

From the same owner

© 2026 NYSGPT2525 LLC