Patent №
US 7,532,034
Granted
2009-05-12
Filed 2006
Owner
NATIONAL CHIAO TUNG UNIVERSITY
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
11489325
A mixed-voltage input/output buffer having low-voltage design comprises a pre-driver, a tracking unit, a driving unit, and input/output pad, a floating-well unit and a transporting unit. The pre-driver receives first data signal and enable signal and outputs first and second data voltages. The tracking unit provides Gate-Tracking function. The driving unit couples the pre-driver and the tracking unit for production of a first buffer voltage corresponding to the first data voltage. The input/output pad couples the driving unit to output a first buffer voltage and to receive a second data signal. The output unit is used for outputting a second buffer voltage corresponding to the second data signal. The floating-well unit couples to the driving unit and the input/output pad in order to output first buffer voltage and receive second data signal. The floating-well unit is used for preventing leakage current.
AI classification
Ownership
NATIONAL CHIAO TUNG UNIVERSITY
assignment · 180780007
Assignors
KER, MING-DOU, CHEN, SHIH-LUN
On an employer assignment, the assignors are typically the inventors.