SEMICONDUCTOR INTEGRATED CIRCUIT INCLUDING MULTIPLE BASIC CELLS FORMED IN ARRAYS

Patent №

US 7,568,084

Granted

2009-07-28

Filed 2004

Owner

HITACHI, LTD.

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

10886616

A basic cell capable of a fixed operating frequency regardless of the configuration information, which is also capable of effectively utilizing the arithmetic logic circuit within the cell in a LSI semiconductor integrated circuit, is capable of dynamic changes in configuration information. The circuit has an input switch ISW connected to multiple data input nodes, an output switch OSW connected to multiple data output nodes, a first data path containing an arithmetic logic circuit ALU and a result storage flip-flop CFF0 between the input switch ISW and output switch OSW. The second data path containing a data transfer flip-flop between an input switch ISW and an output switch OSW, and the result storage flip-flop CFF stores the calculated result data from the arithmetic logic circuit ALU, and the data transfer flip-flop holds data input from any of the multiple data input nodes.

AI hardwareH03K 19/17752H03K 19/17728H03K 19/17736H03K 19/17744H03K 19/1776

AI classification

AI hardware0.91
Machine learning0.00
Natural language0.00
Knowledge representation0.00
Speech0.00
Evolutionary computation0.00
Planning0.00
Vision0.00

Ownership

HITACHI, LTD.

assignment · 158470771

Assignors

TANAKA, HIROSHI, AKITA, YOHEI, HONMURA, TETSURO, ARAKAWA, FUMIO, TSUNODA, TAKANOBU

On an employer assignment, the assignors are typically the inventors.

© 2026 NYSGPT2525 LLC