INTEGRATED CONFIGURATION, FLOW AND EXECUTION SYSTEM FOR SEMICONDUCTOR DEVICE EXPERIMENTAL FLOWS AND PRODUCTION FLOWS

Patent №

US 7,571,019

Granted

2009-08-04

Filed 2005

Owner

INTEL CORPORATION

Lab

AI components

1

evo

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

11325926

According to embodiments of the invention, an integrated configuration, flow and execution systems (ICFES) may be used to specify, control and record a history of processing of both semiconductor device experimental lots and production lots of wafers. Moreover, the system allows combining of one or more partial flows of pre-existing flow blocks, and special processing into another processing flow block. A lot plan can be created that includes the flow block, and the lot plan can be updated to include partial flows and special processing before or during processing of the lot plan.

Evolutionary computationG05B 19/042G05B 15/02G06Q 10/06G06Q 50/04G05B 2219/45031Y02P 90/30

AI classification

Evolutionary computation0.63
Planning0.34
AI hardware0.15
Natural language0.05
Knowledge representation0.03
Speech0.00
Machine learning0.00
Vision0.00

Ownership

INTEL CORPORATION

assignment · 187590039

Assignors

WINSTEAD, CHARLES H., SANKARAN, RAJSHREE P., TAHA, SAMER M., QU, JIANG, MOULI, CHANDRA

On an employer assignment, the assignors are typically the inventors.

From the same owner

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