PROGRAMMABLE LOGIC BASED LATCHES AND SHIFT REGISTERS

A latch is described, comprising: a first programmable logic element (LE); and a second programmable logic element (LE); and an output of the first LE adapted to directly couple to a first input of the second LE; and an output of the second LE coupled to a first input of the first LE; and a first common input coupled to a second input of the first and second LE; and a second common input coupled to a third input of the first and second LE.