CHIP WITH IDE HOST AND IDE SLAVE AND CORRESPONDING SELF-DEBUGGING FUNCTION

A chip with IDE host and IDE slave and corresponding self-debugging function is provided. The chip simplifies IDE debugging of a chip, which comprises a front-end and a backend, by offering separate debugging modes for an IDE host and an IDE slave on the same chip. The front-end provides output data of an internal IDE slave or output data of an external IDE slave in response to a host debug enable signal. The backend is coupled to the front-end. The backend provides functions of an internal IDE host according to the output data of the internal IDE slave or the external IDE slave, or directs the output data of the internal IDE slave to an external IDE host in response to a slave debug enable signal.