ENHANCED METHOD OF OPTIMIZING MULTIPLEX STRUCTURES AND MULTIPLEX CONTROL STRUCTURES IN RTL CODE

Patent №

US 7,594,201

Granted

2009-09-22

Filed 2006

Owner

LSI LOGIC CORPORATION

+1 more

Lab

AI components

1

kr

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

11460680

A method and computer program are disclosed for optimizing RTL code for an integrated circuit design that include steps of method of optimizing register transfer level code for an integrated circuit design comprising steps of receiving as input a first register transfer level code for the integrated circuit design and receiving as input criteria defining a critical multiplex structure. The first register transfer level code is analyzed to identify multiplex structures in the first register transfer level code. Each of the multiplex structures identified in the first register transfer level code is compared to the criteria defining a critical multiplex structure. Each of the multiplex structures identified in the first register transfer level code that satisfy the criteria defining a critical multiplex structure is entered in a list of critical multiplex structures. The list of critical multiplex structures is generated as output.

Knowledge representationG06F 30/327G06F 30/34G06F 30/394

AI classification

Knowledge representation0.66
AI hardware0.45
Planning0.02
Natural language0.01
Evolutionary computation0.00
Vision0.00
Machine learning0.00
Speech0.00

Ownership

LSI LOGIC CORPORATION

assignment · 181970200

LSI CORPORATION

merger · 205480977

Assignors

LAHNER, JUERGEN, ATMAKURI, KIRAN, CHATURVEDULA, KAVITHA

On an employer assignment, the assignors are typically the inventors.

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